Stabilizing high order sigma delta modulators by time delay feedback technique

Second and high order sigma delta modulators (SDM) have been extensively used in data conversion processes since their high resolution. However it is difficult to stabilize second and high order SDM over a wide signal range because of the integrals output saturation. A time delay compensation has been proposed in this paper in order to stabilize high order SDM by keeping the integrators output signal levels below saturation limits most of time. The proposed compensation technique is very simple and contains two design parameters; time delay element and compensation gain. It has been shown that high mode jumping leads integrator clipping can be prevented by tuning the compensation design parameters. Particularly w-domain describing function has been employed to tune compensation gain for desired mode/modes in the closed loop. The effect of the compensation gain has been graphically monitored for a constant delay time. Furthermore, the effect of compensation on overall signal-to-noise ratio (SNR) has also been discussed. The proposed compensation technique can be implemented to various configurations of oversampling converters; single-loop and multiple-loop.