Transaction level modeling: An overview

被引：207
|
作者：
Cai, LK [1 ]
Gajski, D [1 ]
机构：
[1] Univ Calif Irvine, Ctr Embedded Comp Syst, Irvine, CA 92697 USA
来源：
CODES(PLUS)ISSS 2003: FIRST IEEE/ACM/IFIP INTERNATIONAL CONFERENCE ON HARDWARE/SOFTWARE CODESIGN & SYSTEM SYNTHESIS | 2003年
关键词：
transaction level model; modeling; validation; refinement; exploration; synthesis;
D O I：
10.1109/CODESS.2003.1275250
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Recently, the transaction-level modeling has been widely referred to in system-level design community. However, the transaction-level models(TLMs) are not well defined and the usage of TLMs in the existing design domains, namely modeling, validation, refinement, exploration, and synthesis, is not well coordinated. This paper introduces a TLM taxonomy and compares the benefits of TLMs' use.
引用
收藏
页码：19 / 24
页数：6
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