Potentials and Limitations for Energy Efficiency Auto-Tuning

被引：0
|
作者：
Schoene, Robert [1 ]
Knuepfer, Andreas [1 ]
Molka, Daniel [1 ]
机构：
[1] Tech Univ Dresden, Ctr Informat Serv & HPC, Dresden, Germany
来源：
PARALLEL COMPUTING: ACCELERATING COMPUTATIONAL SCIENCE AND ENGINEERING (CSE) | 2014年 / 25卷
关键词：
energy efficiency; tuning; dynamic voltage and frequency scaling; dynamic concurrency throttling; hardware prefetcher; PERFORMANCE ANALYSIS;
D O I：
10.3233/978-1-61499-381-0-678
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
With an objective target of 20 MW for an Exascale system, the power budget for future super computers has a severe restriction. Fortunately, current hardware and runtime environments feature various adjustable parameters that can be changed at runtime in order to confine the power usage. We present an overview of the potentials and limitations of several power saving mechanisms and describe the integration of energy efficiency optimizations in existing performance analysis tools. We also introduce an energy efficiency tuning cycle and exemplify its usage.
引用
收藏
页码：678 / 687
页数：10
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