Novel Injection-Locked Frequency Tripler for V-band Applications

In this paper, a novel injection-locked frequency tripler (ILFT) implemented in the 90-nm CMOS process for V-band applications is presented. By adopting stacked CMOS cross-coupled pairs, a differential harmonic current injection circuit, and a resonator network technique, the locking range, the harmonic rejection ratio (HRR), and the power consumption of the proposed ILFT are improved. The locking range is from 61.2 to 64.2 GHz at an input power level of 0 dBm. The proposed ILFT has 30 dBc and 34 dBc to injected fundamental and second-order harmonic suppression, respectively. The core circuit consumes 7.48 mW dc power from a 1.1-V supply.