Design and test of an active pixel sensor (APS) for space applications

A lot of studies have already been realized on CMOS image sensor (or APS: Active Pixel Sensors), but a few of them deals about the improvements which can be done to the commonly used pixel architecture. While this architecture of 3 or 4 transistors is very stable and has proved many times its efficiency, it still suffers from some weaknesses, in particular concerning the reduction of diode capacitance (which increases pixel gain and thus reduces reset equivalent input noise) and the improvements which can be made on fixed pattern noise (FPN). This paper presents studies and test results on some possible pixel architectures, and their characteristics. A 256 x 256 chip has been fabricated and its tests showed the way of the study of a new high performance APS pixel.