A Fast-Locking Frequency Synthesizer for the Single-Chip CMOS UHF RFID Reader

A fast-locking frequency synthesizer is designed for single-chip UHF RFID Reader. Different from the traditional UHF RFID frequency synthesizer, the technology of multi-modulus divider (MMD) is adopted here, which greatly reduces the design complexity. More importantly, two inverters and one toggle circuit are added to the output of the multi-modulus divider to improve the output load driving capability and the operation speed of the phase frequency detector (PFD), so as to reduce the locking time of the frequency synthesizer. Finally an improved divider by 2 is used at the output stage of the frequency, and the performance of the output waveform is improved. The simulation is made by Cadence in chartered 0.18 mu m CMOS process. The simulation result shows that the output waveform is very good and the locking time is less than 10 mu s. The phase noise of the output signal are approximately -104.8 dBc/Hz at 200 KHz and -124.6 dBc/Hz at 1 MHz offset from 900 MHz operating frequency, which is suitable for UHF RFID Reader. The frequency synthesizer dissipates 28.2 mW with a 1.8 V supply voltage.