Design of the Trap Filter for the High Power Converters with Parallel Interleaved VSCs

The power handling capability of the state-of-the-art semiconductor devices is limited. Therefore, the Voltage Source Converters (VSCs) are often connected in parallel to realize high power converter. The switching frequency semiconductor devices, used in the high power VSCs, is also limited. Therefore, large filter components are often required in order to meet the stringent grid code requirements imposed by the utility. As a result, the size, weight and cost of the overall system increase. The use of interleaved carriers of the parallel connected VSCs, along with the high order line filter, is proposed to reduce the value of the filter components. The theoretical harmonic spectrum of the average pole voltage of two interleaved VSCs is derived and the reduction in the magnitude of some of the harmonic components due to the carrier interleaving is demonstrated. A shunt LC trap branch is used to sink the dominant harmonic frequency components. The design procedure of the line filter is illustrated and the filter performance is also verified by performing the simulation and the experimental study.