Reconfigurable negative group delay circuit with tunable group delay flatness

被引：4

作者：

Meng, Yuwei ^{[1
]}

Wang, Zhongbao ^{[1
]}

Fang, Shaojun ^{[1
]}

Liu, Hongmei ^{[1
]}

机构：

[1] Dalian Maritime Univ, Sch Informat Sci & Technol, Dalian 116026, Liaoning, Peoples R China

来源：

INTERNATIONAL JOURNAL OF RF AND MICROWAVE COMPUTER-AIDED ENGINEERING | 2022年 / 32卷 / 06期

基金：

中国国家自然科学基金;

关键词：

negative group delay; reconfigurable circuit; tunable group delay flatness; DESIGN;

D O I：

10.1002/mmce.23159

中图分类号：

TP39 [计算机的应用];

学科分类号：

081203 ; 0835 ;

摘要：

A reconfigurable negative group delay circuit (NGDC) with tunable group delay flatness is presented. The proposed NGDC is composed of an amplifier, three series resistors connecting with two transmission lines, two varactors, and a diode. By shorting different resistors through the diode, different negative group delay (NGD) times can be obtained. Two varactors are utilized to tune the flatness of the group delay. For verification, an NGDC is designed, fabricated, and measured at the center frequency of 1.0 GHz. The measured NGD time is tuned from -2.0 to -5.8 ns. The flat-NGD bandwidth varies from 2.2% to 8.8% with +/- 8% group-delay fluctuation. And the insertion loss varies from 6.5 to 13.8 dB.

引用

页数：10

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