Low frequency gate noise modeling of ultrathin Oxide MOSFETs

被引:0
|
作者
Martinez, F. [1 ]
Valenza, M. [1 ]
机构
[1] Univ Montpellier 2, CNRS, UMR 5507, IES CEM2 CC84, F-34095 Montpellier 5, France
关键词
tunneling current; gate current noise; RTS noise; 1/f noise in CMOS transistors; low frequency noise; noise in scaled devices; noise in analog circuits; equivalent circuit; noise modeling;
D O I
10.1117/12.726920
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An analytical model for 1/f gate noise is developed and applied to the simulation and the characterization of ultra-thin MOSFETs. The proposed model is based on oxide trapping mechanisms and uses the concept of equivalent flat band voltage fluctuations. The developed model reproduces experimental behaviors. The power spectral density of flat band voltage fluctuation extracted from gate current low frequency noise is compared to one extracted from drain low frequency noise. Moreover, we have performed 1/f gate current noise for various drain voltage, and we show that there is no impact of the drain current noise on the gate current noise. We also investigate RTS noise observed on the gate leakage current. Finally, we present the characterization of the gate to drain overlap leakage current and its influence on gate current noise level.
引用
收藏
页数:12
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