Reduction of DC-link Current Harmonics over Wide Power-Factor Range for Three-Phase VSI using Single-Carrier-Comparison Continuous PWM

被引:0
|
作者
Nishizawa, Koroku [1 ]
Itoh, Jun-ichi [1 ]
Fujita, Satoru [2 ]
Odaka, Akihiro [2 ]
Toba, Akio [2 ]
Umida, Hidetoshi [2 ]
机构
[1] Nagaoka Univ Technol, Nagaoka, Niigata, Japan
[2] Fuji Elect Co Ltd, Tokyo, Japan
关键词
Motor drive system; DC-link capacitor; Inverter C-link current harmonics; Continuous PWM; FLUX;
D O I
暂无
中图分类号
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号
0807 ; 0820 ;
摘要
This paper proposes a novel continuous PWM (CPWM) method to reduce DC-link current harmonics in voltage source inverters (VSIs) over wide range of load power factor. This modulation method contributes to a lifetime extension of smoothing capacitors in motor drive systems. Furthermore, a high cost digital hardware such as a field-programmable gate array (FPGA) is not necessary because this modulation is implemented with only one carrier. The DC-link current harmonics are reduced by shifting voltage references in every half control period to reduce a fluctuation of the DC-link current around its average value. Experimental results confirm that the application of the proposed CPWM reduces the DC-link current harmonics by 24.2% at most.
引用
收藏
页码:6772 / 6779
页数:8
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