Remarks on hardware implementation of image processing algorithms

被引：7
|
作者：
Wnuk, Marek [1 ]
机构：
[1] Wroclaw Univ Technol, Inst Comp Engn Automat & Robot, PL-50372 Wroclaw, Poland
来源：
INTERNATIONAL JOURNAL OF APPLIED MATHEMATICS AND COMPUTER SCIENCE | 2008年 / 18卷 / 01期
关键词：
on-line image processing; real-time; hardware; pipeline; programmable logic;
D O I：
10.2478/v10006-008-0010-2
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
Image processing in industrial vision systems requires both real-time speed and robustness. Modem computers, which fulfill the first demand, are sensitive to hard industrial environment conditions and require considerable amounts of energy. Programmable logic chips are available, which can realize many simple, still time-consuming operations in a parallel or a pipelined manner. The paper discusses particular features of the pipelined architecture and presents selected techniques of implementing early image processing procedures in hardware.
引用
收藏
页码：105 / 110
页数：6
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