Dual Mode Ferroelectric Transistor based Non-Volatile Flip-Flops for Intermittently-Powered Systems

被引:10
|
作者
Thirumala, S. K. [1 ]
Raha, A. [1 ,2 ]
Jayakumar, H. [1 ,3 ]
Ma, K. [4 ]
Narayanan, V [4 ]
Raghunathan, V [1 ]
Gupta, S. K. [1 ,4 ]
机构
[1] Purdue Univ, W Lafayette, IN 47907 USA
[2] Intel Corp, Santa Clara, CA 95051 USA
[3] Qualcomm Inc, San Diego, CA USA
[4] Penn State Univ, University Pk, PA 16802 USA
关键词
Check-pointing; FEFETs; Hysteresis; Non-volatile flip-flop;
D O I
10.1145/3218603.3218653
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this work, we propose dual mode ferroelectric transistors (D-FEFETs) that exhibit dynamic tuning of operation between volatile and non-volatile modes with the help of a control signal. We utilize the unique features of D-FEFET to design two variants of non-volatile flip-flops (NVFFs). In both designs, D-FEFETs are operated in the volatile mode for normal operations and in the non-volatile mode to backup the state of the flip-flop during a power outage. The first design comprises of a truly embedded non-volatile element (D-FEFET) which enables a fully automatic backup operation. In the second design, we introduce need-based backup, which lowers energy during normal operation at the cost of area with respect to the first design. Compared to a previously proposed FEFET based NVFF, the first design achieves 19% area reduction along with 96% lower backup energy and 9% lower restore energy, but at 14%-35% larger operation energy. The second design shows 11% lower area, 21% lower backup energy, 16% decrease in backup delay and similar operation energy but with a penalty of 17% and 19% in the restore energy and delay, respectively. System-level analysis of the proposed NVFFs in context of a state-of-the-art intermittently-powered system using real benchmarks yielded 5%-33% energy savings.
引用
收藏
页码:176 / 181
页数:6
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