Design of a CMOS Current-mode Squaring Circuit for Training Analog Neural Networks

被引：1

作者：

Park, So-Hyeon ^{[1
]}

Lee, Jae-Hee ^{[1
]}

Jeong, Hang-Geun ^{[1
]}

Im, Donggu ^{[1
]}

机构：

[1] Chonbuk Natl Univ, Div Elect Engn, Jeonju, South Korea

来源：

2020 17TH INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC 2020) | 2020年

基金：

新加坡国家研究基金会;

关键词：

Squaring circuit; CMOS; Analog neuron; translinear;

D O I：

10.1109/ISOCC50952.2020.9333090

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

we propose a new current mode CMOS squaring circuit which directly yields the square term. The proposed squaring circuit was designed in a standard with 0.18 um CMOS technology. The designed chip occupies a chip area of 408 mu m X 197 mu m and consumes a power of 3.6mW. The proposed squaring circuit can be used in current mode applications as in analog neurons.

引用

页码：250 / 251

页数：2

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