A low-power high-rate modulator for ultra-wideband transmitters

A pulse modulator for ultra-wideband transmitters is designed and simulated using a 0.18-mu m CMOS technology. 4-GHz carrier frequency is modulated into pulses with Gaussian envelop to push the spectrum to 3.1-5-GHz band. The transmitter brings low power operation due to digital structure, and high data transmission due to using I/Q modulation. The architecture of the modulator consists of Johnson counter, multiplier, adder and RF mixer. The key element in the design is ETSPC flip-flops (FFs) that fulfill high speed and low power requirements. The power-speed tradeoff is optimized by decreasing the size of the FFs, and using direct conversion structure for RF mixer. The power consumption of the modulator from a 1.8-V power supply is as low as 6 mW for the rate of 1 Gchip/s.