Non-destructive examination of impulse generator pulses

There is a need for single-shot impulse voltages above 50 kV for researching the transient high field breakdown strength of new dielectric materials and insulator/conductor laminates that are being developed for the packaging and hear sinking of power electronics components and modules. A Marx Bank can reproduce the circuit characteristics of such impulse transients. To produce a single-shot impulse waveform with a peak voltage of 600 kV, having 15 kJ of energy, the Marx Bank used had six 100 kV, 0.5 mu F capacitors arranged in six stages, charged in parallel, and discharged in series. The overall performance and reliability of this Marx Bank was improved by inserting new high power, non-inductive resistors in the discharge circuit to dissipate excess energy resulting from switch misfires and load faults. Among the specific technical design issues addressed is the development of a new Non-destr uctive Examination Technique (NDET) for different modes of Marx Bank operation, which determines if output load faults or switch misfires will be safely tolerated by the resistors used in the charge/discharge circuits. The worst case analyzed was the misfiring of one of the stage switches resulting in the load completely faulting, i.e.. a short circuit. In addition to undesirable output current and voltage oscillations, this forced 2.5 kJ of energy to be dumped into three tail resistors of the misfired stage, approximately 830 J per unit. These tail resistors, each rated for a maximum energy of 625 J in the original design, can be destroyed with a transfer of 830 J. Initial results, including computer simulations and laboratory measurements, using a new fault protecting, energy-absorbing resistor placed in series with the Marx output load are presented. Also. circuit design recommendations for further reduction in fault energies dissipated in the tail resistors of a misfired stage are discussed. As well as, the elimination of current ringing from the fault-protecting resistor underfault conditions is described.