Measurement-based modeling and test methodology for integrated substrates

A methodology for simulating high-speed integrated substrates in the time domain using Network Analyzer (NA) and Time Domain Reflectometry (TDR) measurements is discussed. For accurate simulation, transmission lines with distributed effects such as delay were simulated separately using Non-physical RLGC models and W-element (Hspice). For importing measured data into circuit simulators, a rational function approximation satisfying stability and passivity conditions have been developed. Simulation of a chip-to-chip interconnection is presented to demonstrate the validity of the methodology.