SIGNAL DRIVEN PARTITIONING LARGE CIRCUITS

Partitioning is a central problem in VLSI design automation, addressing circuit's manufacturability. Circuit partitioning has multiple applications in VLSI design. One of the most common is that of dividing combinational circuits (usually large ones) that will not fit on a single package among a number of packages. Partitioning is of practical importance for k-LUT based FPGA circuit implementation. In this work is presented new multilevel and multi-resource partitioning algorithm targeting large combinational circuits in order to efficiently use existing FPGAs circuits.