Software Fault Tolerance in PISAT

被引:0
|
作者
Krishna, Adithya [1 ]
Baliga, B. Naveen [1 ]
Kashyap, Harish [1 ]
Nayak, Mahendra M. [2 ]
Rao, Divya A. [2 ]
Agrawal, V. K. [2 ]
机构
[1] PES Inst Technol, Dept Elect & Elect Engn, Bangalore, Karnataka, India
[2] PES Inst Technol, Crucible Res & Innovat, Bangalore, Karnataka, India
关键词
fault avoidance; fault tolerance; OBC; FDI; safe mode;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Systems used in safety critical applications such as satellites are required to be highly reliable. Among these are computing, electrical and electronic systems. High reliability is achieved by using fault avoidance and fault tolerance techniques. Several fault tolerance and avoidance strategies have been used, based on the requirements and constraints of specific missions. These strategies usually lead to an increase in the mass, size and cost of satellites, which makes them a luxury that is not affordable in small scale student satellites. PISAT, a nano-class satellite comprises of Commercial off the Shelf (COTS) components for most of its on-board systems, along with its software being designed and developed by students. Thus, the probability that PISAT is susceptible to faults is higher when compared to a commercial satellite. This paper details the fault tolerance and avoidance strategies implemented and tested in PISAT. These strategies will ensure that the desired mission life of PISAT and any other small scale satellite under mass, size and cost constraints is achieved.
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页数:6
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