Analogue sum ASIC for L1 trigger decision in Cherenkov Telescope cameras

被引:1
|
作者
Barrio, J. A. [1 ]
Blanch, O. [2 ]
Boix, J. [2 ]
Delagnes, E. [3 ]
Delgado, C. [4 ]
Freixas Coromina, L. [4 ]
Gascon, D. [5 ]
Guilloux, F. [3 ]
Lopez Coto, R. [2 ]
Martinez, G. [4 ]
Sanuy, A. [5 ]
Tejedor, L. A. [1 ]
机构
[1] Univ Complutense Madrid, E-28040 Madrid, Spain
[2] Inst Fis Altes Energies, Bellaterra 08193, Spain
[3] CEA Saclay, CEA, F-91191 Gif Sur Yvette, France
[4] Ctr Invest Energet Medioambientales & Tecnol CIEM, Madrid 28040, Spain
[5] Univ Barcelona, E-08028 Barcelona, Spain
来源
关键词
Cherenkov detectors; Trigger concepts and systems (hardware and software); Front-end electronics for detector readout;
D O I
10.1088/1748-0221/10/02/C02016
中图分类号
TH7 [仪器、仪表];
学科分类号
0804 ; 080401 ; 081102 ;
摘要
The Cherenkov Telescope Array (CTA) project [1] aims to build the largest ground-based gamma-ray observatory based on an array of Imaging Atmospheric Cherenkov Telescopes (IACTs). The CTA will implement a multi-level trigger system to distinguish between gamma ray-like induced showers and background images induced by night sky background (NSB) light [2]. The trigger system is based on coincident detections among pixels (level 0 trigger), clusters of pixels (level 1) or telescopes. In this article, the first version of the application specific integrated circuit (ASIC) for Level 1 trigger system is presented, capable of working with different Level 0 strategies and different trigger region sizes. In addition, it complies with all the requirements specified by the CTA project, specially the most critical ones as regards noise, bandwidth, dynamic range and power consumption. All these features make the presented system very suitable for use in the CTA cameras and improve the features of discrete components prototypes of the L1 trigger circuit in terms of compactness, noise, performance and power consumption.
引用
收藏
页数:10
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