共 50 条
- [4] NOVEL HIGH-PERFORMANCE MECHANISM FOR THE PREDICTION OF INTER-ROUTER SWITCH ALLOCATION [J]. ELECTRONICS WORLD, 2015, 121 (1953): : 28 - 31
- [5] A high-performance scheduling algorithm for buffered crossbar switch [J]. COMPUTATIONAL MATERIALS SCIENCE, PTS 1-3, 2011, 268-270 : 2101 - 2107
- [7] THE FAST PACKET RING SWITCH - A HIGH-PERFORMANCE EFFICIENT ARCHITECTURE WITH MULTICAST CAPABILITY [J]. WORLD PROSPERITY THROUGH COMMUNICATIONS, VOLS 1-3: CONFERENCE RECORD, 1989, : 884 - 891
- [8] CISOQ: A practical high-performance packet switch architecture for the support of multicast traffic [J]. PDCAT 2005: Sixth International Conference on Parallel and Distributed Computing, Applications and Technologies, Proceedings, 2005, : 139 - 143
- [10] HiPER-P: An efficient, high-performance router for multicomputer interconnection networks [J]. PARALLEL COMPUTER ROUTING AND COMMUNICATION, 1998, 1417 : 103 - 116