A Framework for Specification and Verification of Timeout Models of Real-Time Systems

被引:0
|
作者
Misra, Janardan [1 ]
机构
[1] EMCSS India Private Ltd, Bangalore 560103, Karnataka, India
来源
CONTEMPORARY COMPUTING | 2011年 / 168卷
关键词
Timeout models; Timeout Transition Diagram; Graphical Specification; GraphML; SAL;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Timeout based models are an important class of design models for discrete event modeling and simulation of real-time systems and protocols. In this work, we define a framework to graphically represent timeout based models with synchronous communication. The formalism offers system designers an expressive graphical language with well defined semantics to model their system designs and reason about their behavior. For actual implementation, these models are expressed using GraphML standard with support for embedded ANSI C code. We further devise an automated translation technique (and develop corresponding prototype tool support) to translate the GraphML designs into SAL (Symbolic Analysis Laboratory) model specifications, which in turn, can be formally verified using the SAL verification engine.
引用
收藏
页码:146 / 157
页数:12
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