RETRACTED: Real-time Data Storage Research Based on RAM (Retracted Article)

被引:0
|
作者
Zhang Yan [1 ]
Liu Wenyi [2 ]
机构
[1] N Univ China, Elect & Comp Sci Technol Coll, Taiyuan 030051, Peoples R China
[2] N Univ China, Elect Measurement Technol Key Lab, Taiyuan 030051, Peoples R China
关键词
internal RAM; Timing; FIFO; RAM address bits; clock transition;
D O I
10.1109/ICCTD.2009.36
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
The use of FPGA internal RAM can be an effective alternative to external FIFO, using the method OF Programming FOR the FPGA, Make full use of FPGA internal resources that provided strong support For the realization of a programmable system chip (SOPC, System On Programable Chip).It Effected reducing the use of devices and minimizing the circuit boards. Acquisition and storage respectively controled by two FPGA chips in this study. Use their own internal RAM, program variety controlling models by VHDL hardware language. And then connect the internal schematic to replace the external FIFO. This is the internal FIFO of FPGA..
引用
收藏
页码:359 / +
页数:3
相关论文
共 50 条