A divide-and-conquer approach to estimating minimum/maximum leakage current

Forcing primary inputs and memory elements into certain logic values is a viable method to lower standby leakage current for CMOS circuits. This paper presents a divide-and-conquer approach to finding out an input vector that leads a circuit into a low (high) leakage state. With only a small fraction of time, our approach can achieve up to 11% smaller leakage than the lowest and up to 20% larger leakage than the highest respectively attainable with 100K random vectors for the large ISCAS benchmark circuits. Our results are as good as that obtained by simulated annealing and genetic algorithm that run for a very long time. Due to its divide-and-conquer nature, it will be scalable for even larger circuits.