A High Current efficiency Stacked Digital Low Dropout Array with True-Random-Noise Injection and Ultralow Output Ripple for Power-Side Channel Attack Protection

被引：0

作者：

Lee, Cheng-Yen ^{[1
]}

Huang, Tzu-Ping ^{[1
]}

Chen, Ke-Horng ^{[1
]}

Lin, Ying-Hsi ^{[2
]}

Lin, Shian-Ru ^{[2
]}

Tsai, Tsung-Yen ^{[2
]}

机构：

[1] Natl Chiao Tung Univ, Hsinchu, Taiwan

[2] Realtek Semicond Corp, Hsinchu, Taiwan

来源：

2019 SYMPOSIUM ON VLSI CIRCUITS | 2019年

关键词：

D O I：

10.23919/vlsic.2019.8778069

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper proposes a stacked digital low dropout (DLDO) array with three stacked groups to improve security and efficiency, consuming 1/3 of the input current in the prior art. The security is improved by two mechanisms. The advanced encryption standard (AES) engine can be one of point of loads (POLs) hidden in the deeper levels to minimize the disturbance from the AES to the input current. The other is the digital balanced interleave control (DBIC) receives random sources from internal leakage current frequency generator (LCFG) to generate randomly noise current to further hide the current interference caused by the AFS. Due to DBIC anti LCFG techniques, the correlation between input current and AES current is low to 0.006, which is 150 times lower than that of conventional DLDO.

引用

页码：C322 / C323

页数：2