A 0.25 μm InP DHBT 200 GHz+ Static Frequency Divider

被引：13

作者：

D'Amore, Matt ^{[1
]}

Monier, Cedric ^{[1
]}

Lin, Steven Taiyu ^{[1
]}

Oyama, Bert ^{[1
]}

Scott, Dennis W. ^{[1
]}

Kaneshiro, Eric N. ^{[1
]}

Chang, Ping-Chih ^{[1
]}

Sato, Kenneth F. ^{[1
]}

Niemi, Alex ^{[1
]}

Dang, Linh ^{[1
]}

Cavus, Abdullah ^{[1
]}

Gutierrez-Aitken, Augusto ^{[1
]}

Oki, Aaron K. ^{[1
]}

机构：

[1] Northrop Grumman Aerosp Syst, Redondo Beach, CA 90278 USA

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2010年 / 45卷 / 10期

关键词：

Digital; divider; frequency; HBT; high speed; InP; static;

D O I：

10.1109/JSSC.2010.2058171

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Static frequency dividers are widely used technology performance benchmark circuits. Using a 0.25 mu m 530 GHz f(T)/600 GHz+ f(max) InP DHBT process, a static frequency divider circuit has been designed, fabricated, and measured to operate up to 200.6 GHz [1]. The divide-by-two core flip-flop dissipates 228 mW. Techniques used for the divider design optimization and for selecting variants to maximize performance across process changes are also discussed.

引用

页码：1992 / 2002

页数：11

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