共 50 条
- [1] Implementation of SOG devices with embedded through-wafer silicon vias using a glass reflow process for wafer-level 3D MEMS integration [J]. MEMS 2008: 21ST IEEE INTERNATIONAL CONFERENCE ON MICRO ELECTRO MECHANICAL SYSTEMS, TECHNICAL DIGEST, 2008, : 802 - +
- [5] Theoretical model and experiments of glass reflow process in TGV for 3D wafer-level packaging [J]. 2018 5TH IEEE INTERNATIONAL SYMPOSIUM ON INERTIAL SENSORS & SYSTEMS (INERTIAL 2018), 2018, : 85 - 88
- [6] Through-wafer interconnection by deep damascene process for MEMS and 3D wafer level packaging [J]. PROCEEDINGS OF THE 7TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE, VOLS. 1 AND 2, 2005, : 238 - 242
- [8] Wafer Level Fabrication of 3D Glass-Embedded Components using Glass Reflow Process [J]. 2015 IEEE 65TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2015, : 1822 - 1827