Implementation of silicon-on-glass MEMS devices with embedded through-wafer silicon vias using the glass reflow process for wafer-level packaging and 3D chip integration

被引:48
|
作者
Lin, Chiung-Wen [1 ]
Hsu, Chia-Pao [2 ]
Yang, Hsueh-An [3 ]
Wang, Wei Chung [1 ,3 ]
Fang, Weileun [1 ,2 ]
机构
[1] Natl Tsing Hua Univ, Inst nanoengn & Microsyst, Hsinchu, Taiwan
[2] Natl Tsing Hua Univ, Dept Power Mech Engn, Hsinchu, Taiwan
[3] Adv Semicond Engn Inc, Kaohsiung, Taiwan
关键词
D O I
10.1088/0960-1317/18/2/025018
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This study presents a novel system architecture to implement silicon-on-glass (SOG) MEMS devices on Si-glass compound substrate with embedded silicon vias. Thus, the 3D integration of MEMS devices can be accomplished by means of through-wafer silicon vias. The silicon vias connecting to the pads of devices are embedded inside the Pyrex glass. Parasitic capacitance for both vias and microstructures is decreased and mismatch of coefficient of thermal expansion (CTE) is reduced. In applications, the glass reflow process together with the SOG micromachining processes were employed to implement the presented concept. Successful driving of the resonator through the silicon vias is demonstrated. The wafer-level hermetic packaging can be further achieved by anodic bonding of a Pyrex7740 wafer. Hermeticity of the packaged device performed by helium leak test satisfied MIL-STD-883E. The packaged SOG device is SMT ( surface mount technology) compatible and ready for 3D microsystem integration.
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页数:6
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