An Ultra-Low-Power 24 GHz Low-Noise Amplifier Using 0.13 μm CMOS Technology

被引:13
|
作者
Cho, Wei-Han [1 ,2 ]
Hsu, Shawn S. H. [1 ,2 ]
机构
[1] Natl Tsing Hua Univ, Dept Elect Engn, Hsinchu 300, Taiwan
[2] Natl Tsing Hua Univ, Inst Elect Engn, Hsinchu 300, Taiwan
关键词
CMOS; k-band; low-noise amplifier (LNA); low power;
D O I
10.1109/LMWC.2010.2085038
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This study presents an ultra-low-power 24 GHz low-noise amplifier (LNA) using 0.13 mu m CMOS technology. We propose of using the minimum noise measure (M(MIN)) as the guideline to determine the optimal bias and geometry of the transistors in the circuit. The power-constrained simultaneous noise and input matching (PCSNIM) technique is also employed for this design. With the proposed design approach, the LNA achieves a peak gain of 9.2 dB and a minimum NF of 3.7 dB under a supply voltage of 1 V. The associated power consumption is only 2.78 mW.
引用
收藏
页码:681 / 683
页数:3
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