Architecture and implementation of a distributed reconfigurable metacomputer

被引：6
|
作者：
Morrison, JP [1 ]
Healy, PD [1 ]
O'Dowd, PJ [1 ]
机构：
[1] Natl Univ Ireland Univ Coll Cork, Dept Comp Sci, Cork, Ireland
来源：
SECOND INTERNATIONAL SYMPOSIUM ON PARALLEL AND DISTRIBUTED COMPUTING, PROCEEDINGS | 2003年
关键词：
D O I：
10.1109/ISPDC.2003.1267657
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
The use of application-specific co-processors created using reconfigurable hardware (FPGAs) has been shown to realize significant speed increases for many computationally intensive applications. The addition of reconfigurable hardware to clusters composed of commodity machines in order to improve the execution times of parallel applications would, therefore, appear to be a logical step. However, the extra complications introduced by this technique may make the real-world application of such technology appear to be prohibitively difficult. In this paper the design and implementation of a metacomputer designed to simplify the development of applications for clusters containing reconfigurable hardware are presented. The operation of the metacomputer is also discussed in some detail, including the process of implementing applications for execution on the metacomputer.
引用
收藏
页码：153 / 158
页数：6
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