Modelling on-chip circular double-spiral stacked inductors for RFICs

被引:12
|
作者
Yin, WY
Pan, SJ
Matsumura, WL
Li, LW
机构
[1] Natl Univ Singapore, Temasek Labs, Singapore 119260, Singapore
[2] Natl Univ Singapore, Dept Elect & Comp Engn, Singapore 117548, Singapore
关键词
D O I
10.1049/ip-map:20030854
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Extensive experimental results and detailed investigations of the performance of on-chip circular double-spiral stacked inductors on silicon substrates are presented. Based on a proposed equivalent circuit model and measured S-parameters using the de-embedding technique, the inductance L, resonant frequency f(res), Q-factor, coupling capacitance between the upper and lower spirals, and oxide capacitance of these inductors are extracted and compared with the single-spiral case. Some locally scalable formulas, including single-spiral geometries, are obtained to predict inductor performance. Methods to improve the L and Q-factor are explored for double-spiral stacked inductors with single via connection.
引用
收藏
页码:463 / 469
页数:7
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