An efficient implementation of the 1D DCT using FPGA technology

被引：0
|
作者：
El-Banna, H [1 ]
El-Fattah, AA [1 ]
Fakhr, W [1 ]
机构：
[1] Elect Res Inst, Cairo, Egypt
来源：
ICM 2003: PROCEEDINGS OF THE 15TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS | 2003年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper describes and represents different algorithms and efficient. implementation of One Dimensional 8 point Discrete Cosine Transform on Field Programmable Gate Arrays. One of the main objectives is to minimize the complexity of operations as much as possible while maintaining low delays and high speed throughput. Distributed Arithmetic, is a powerful technique that has. been used for fast and efficient implementation of 1D DCT on FPGA.
引用
收藏
页码：278 / 281
页数：4
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