Validation of Context Preserving Thread-Level Speculative Execution Using N-Queens Comparison of Non-CPSE and CPSE-enabled Applications

被引：0

作者：

Mason, Jack L. ^{[1
]}

机构：

[1] Pema Technol Inc, Elk Ridge, UT 84651 USA

来源：

2017 18TH INTERNATIONAL WORKSHOP ON MICROPROCESSOR AND SOC TEST, SECURITY AND VERIFICATION (MTV 2017) | 2017年

关键词：

speculative execution; validation testing; system simulation; target environment;

D O I：

10.1109/MTV.2017.21

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

Due to simulation overhead, validation of proposed microarchitecture enhancements may be limited to simple test scenarios, which focus on the known architectural deficiencies. These test scenarios often avoid a complete simulation of the eventual target environment in which the enhancements will be employed. A case study is presented, comparing and contrasting the performance of an 8x8 N-Queens algorithm, in both a non-Thread-Level Speculation (TLS) configuration, and utilizing the Context Preserving Speculative Execution (CPSE) configuration. Validation is performed within the constraints of a simulated target environment. A brief introduction of TLS proposals is also included.

引用

页码：32 / 34

页数：3