The Performance-Complexity Efficient Time-to-Digit and Data-Processing Chips Design and Validation for a LiDAR System

被引：0

作者：

Cheng, Ching-Hwa ^{[1
]}

Chao, Ching-Kun ^{[1
]}

Yeh, Kai-Chun ^{[1
]}

Liu, Don-Gey ^{[1
]}

Lin, Sheng-Di ^{[2
]}

机构：

[1] Feng Chia Univ, Dept Elect, Taichung, Taiwan

[2] Natl Chiao Tung Univ, Dept Elect, Hsinchu, Taiwan

来源：

2021 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2021年

关键词：

LiDAR system chip;

D O I：

10.1109/ISCAS51556.2021.9401235

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Light Detection and Ranging (LiDAR) is a high-price system for wide-usage automotive driving requirements. The design, implementation, and validation of a performance-complexity efficient LiDAR system are introduced in this paper. A Time-to-Digit (TDC) chip with a low-cost Data-Processing (DP) chip is utilized in this system. The proposed chips have been well validated and can be utilized as processing cores for a generic LiDAR system. The measurement accuracy is a comparison with a high-price commercial product of Time-Correlated Single-Photon-Counting (TCSPC). The values show the proposed system accuracy is respectable for the comparison by many distances from 4.8m to 44.6m, the maximum difference is 0.3%.

引用

页数：4