Partitioning based approach for finite state machine state encoding targeting low power

State encoding is one of the most crucial steps in the synthesis of finite state machines. Due to the enhanced emphasis on low power circuit design, state encoding strategies targeting low power consumption are sought after. Other approaches try to solve the problem by partitioning the FSM into two sub-FSMs -this generally require larger register area. This paper utilizes the concept of state partitioning to solve the state-encoding problem. Experimental results show that even without physically partitioning the FSM into sub-FSMs, the scheme results in 48.89% power reduction over NOVA [1] and 26.64% lesser power than GA-D [2] which is directed towards low power state encoding.