Principle and Topology Synthesis of Integrated Single-Input Dual-Output and Dual-Input Single-Output DC-DC Converters

被引:92
|
作者
Chen, Guipeng [1 ]
Jin, Zhufeng [2 ]
Deng, Yan [2 ]
He, Xiangning [2 ]
Qing, Xinlin [1 ]
机构
[1] Xiamen Univ, Sch Aerosp Engn, Xiamen 361005, Peoples R China
[2] Zhejiang Univ, Coll Elect Engn, Hangzhou 310027, Zhejiang, Peoples R China
关键词
Dual-input single-output (DISO); single-input dual-output (SIDO); topology synthesis; zero-voltage switching (ZVS); DC/DC CONVERTER; CROSS-REGULATION; POST-REGULATOR; MULTIPLE; SWITCH;
D O I
10.1109/TIE.2017.2760856
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In applications that demand single-input dualoutput (SIDO) or dual-input single-output (DISO) dc-dc converters, employing two separate single-input single-output (SISO) converters is a solution. However, the number of components is doubled, resulting in high overall cost. In order to reduce costs, this paper proposes a novel topology synthesis methodology, with which a variety of SIDO and DISO dc-dc converters with reduced components can be derived. The principle of topology synthesis states that integrated SIDO and DISO dc-dc converters can be easily developed from conventional SISO converters by replacing a diode with a basic cell inclusive of additional input/output port. The principle is effective for many SISO dc-dc converters, and as an example, topology synthesis based on buck, boost, buck-boost, Cuk, sepic, and zeta SISO converters is performed in this paper. In order to achieve better understanding of the proposed converters, the integrated SIDO Cuk converter is specifically analyzed and experimentally verified. In comparison with the conventional scheme of two separate SISO Cuk converters, good cross regulation is retained while the number of diodes, inductors, and capacitors is reduced in the proposed SIDO Cuk converter. In addition, zero-voltage-switching operation of one switch is achieved, contributing to lower switching losses. Finally, a prototype circuit with 48-V input and 156 V/1 A, 24 V/4 A outputs is built to validate the theoretical analysis.
引用
收藏
页码:3815 / 3825
页数:11
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