The Jitter Use to Reduce EMI on the Power Lines for Multi-core Processors

In this paper, possibilities to reduce electromagnetic interference (EMI) in Globally Asynchronous Locally Synchronous (GALS) digital systems by applying jitter modeled by Monte Carlo simulation have been examined and presented. The aim is to protect digital systems which are prone to errors due to undesirable noises at current processors' miniaturization. By using a special software to analyze EMI, several different abstract models of GALS circuits have been designed in order to extract realistic data regarding their EMI characteristics. Based on the derived clock characteristics and our tool, we were able to analyze current profiles of each of the modeled systems, both in frequency and in time domain. The results were compared with their synchronous counterparts. Further investigations have shown that EMI reduction can be achieved by using low-noise GALS systems, in comparison with their synchronous equivalents. In addition, we have analyzed EMI reduction regarding granulation of the GALS system with different jitter settings. The results were extrapolated to asynchronous systems.