Design of power-efficient parallel pipelined Bloom filter

被引：2

作者：

Kim, Deokho ^{[1
]}

Oh, Doohwan ^{[1
]}

Ro, Won W. ^{[1
]}

机构：

[1] Yonsei Univ, Sch Elect & Elect Engn, Seoul 120749, South Korea

来源：

ELECTRONICS LETTERS | 2012年 / 48卷 / 07期

基金：

新加坡国家研究基金会;

关键词：

D O I：

10.1049/el.2011.2798

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A Bloom filter is a space-efficient hash filter which is widely used in various areas. In fact, high throughput and low power consumption have been required in the Bloom filter architecture. To satisfy these requirements, proposed is a new parallelised Bloom filter design. The proposed design provides performance improvement with lower power consumption and higher computation throughput compared to the regular Bloom filter.

引用

页码：367 / U98

页数：2

共 50 条

[1] Strategy for power-efficient design of parallel systems
Danckaert, K
Masselos, K
Catthoor, F
De Man, HJ
Goutis, C
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 1999, 7 (02) : 258 - 265
[2] Design of power-efficient pipelined truncated multipliers with various output precision
Kuang, S.-R.
Wang, J.-P.
IET COMPUTERS AND DIGITAL TECHNIQUES, 2007, 1 (02): : 129 - 136
[3] A synthesis tool for power-efficient base-band filter design
Giannini, V.
Nuzzo, P.
De Bernardinis, F.
Craninckx, J.
Come, B.
D'Amico, S.
Baschirotto, A.
2006 DESIGN AUTOMATION AND TEST IN EUROPE, VOLS 1-3, PROCEEDINGS, 2006, : 160 - +
[4] Power-efficient FIR filter architecture design for wireless embedded system
Lin, SF
Huang, SC
Yang, FS
Ku, CW
Chen, LG
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2004, 51 (01) : 21 - 25
[5] A Power-Efficient Compact Pipelined ADC for ZigBee Receiver Applications
Shi, Zuochen
Yang, Yintang
Li, Di
Liu, Yang
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2016, 25 (09)
[6] Power-efficient asynchronous design
Liu, Yijun
Li, Zhenkun
Chen, Pinghua
Liu, Guangeong
20TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS: TECHNOLOGY CHALLENGES IN THE NANOELECTRONICS ERA, 2007, : 451 - +
[7] Fully Pipelined Bloom Filter Architecture
Paynter, Michael
Kocak, Taskin
IEEE COMMUNICATIONS LETTERS, 2008, 12 (11) : 855 - 857
[8] Power-Efficient Pipelined Multiprocessor Architecture With Parallel Trace-Back Mechanism for Multiple Pairwise Sequence Alignment
Sarkar, Ardhendu
Ghosh, Surajeet
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 43 (08) : 2365 - 2378
[9] Analysis and design of power-efficient coding schemes with parallel concatenated convolutional codes
Huettinger, Simon
Huber, Johannes
IEEE TRANSACTIONS ON COMMUNICATIONS, 2006, 54 (07) : 1251 - 1258
[10] Implementation of Improved Hash and Mapping Modified Low Power Parallel Bloom Filter Design
Saravanan, K.
Senthilkumar, A.
INTERNATIONAL JOURNAL OF INFORMATION SECURITY AND PRIVACY, 2013, 7 (04) : 11 - 21

← 1 2 3 4 5 →