Parallelity in high-level simulation architectures

被引:0
|
作者
Jugel, ML [1 ]
Sydow, A [1 ]
机构
[1] German Natl Res Ctr Informat Technol, Syst Anal & Simulat Dept, Res Inst Comp Architecture & Software Technol, D-12489 Berlin, Germany
关键词
parallel computing; high-level architecture; environmental simulation;
D O I
暂无
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
The simulation of large and complex systems requires looking at the more general aspects of combined simulation systems. The simulation architecture takes the different notions of parallelity into account with respect to their mathematical and systematic contexts. This is necessary for optimizing large systems and to allow automation of the simulation process.
引用
收藏
页码:101 / 103
页数:3
相关论文
共 50 条
  • [1] A framework for high-level simulation and optimization of fine-grained reconfigurable architectures
    Pasha, Muhammad Adeel
    Farooq, Umer
    Siddiqui, Bilal
    [J]. SIMULATION-TRANSACTIONS OF THE SOCIETY FOR MODELING AND SIMULATION INTERNATIONAL, 2019, 95 (08): : 737 - 751
  • [2] HIGH-LEVEL SECURITY ARCHITECTURES AND THE KERBEROS SYSTEM
    RUSSELL, D
    [J]. COMPUTER NETWORKS AND ISDN SYSTEMS, 1990, 19 (3-5): : 201 - 214
  • [3] Compiling high-level languages for vector architectures
    Rickett, CD
    Choi, SE
    Chamberlain, BL
    [J]. LANGUAGES AND COMPILERS FOR HIGH PERFORMANCE COMPUTING, 2005, 3602 : 224 - 237
  • [4] High-Level Synthesis for Designing Multimode Architectures
    Andriamisaina, Caaliph
    Coussy, Philippe
    Casseau, Emmanuel
    Chavet, Cyrille
    [J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2010, 29 (11) : 1736 - 1749
  • [5] Analytical-based high-level simulation of the microthreaded many-core architectures
    Uddin, Irfan
    Poss, Raphael
    Jesshope, Chris
    [J]. 2014 22ND EUROMICRO INTERNATIONAL CONFERENCE ON PARALLEL, DISTRIBUTED, AND NETWORK-BASED PROCESSING (PDP 2014), 2014, : 344 - 351
  • [6] Cache-based high-level simulation of microthreaded many-core architectures
    Uddin, Irfan
    Poss, Raphael
    Jesshope, Chris
    [J]. JOURNAL OF SYSTEMS ARCHITECTURE, 2014, 60 (07) : 529 - 552
  • [7] One-IPC high-level simulation of microthreaded many-core architectures
    Uddin, Irfan
    [J]. INTERNATIONAL JOURNAL OF HIGH PERFORMANCE COMPUTING APPLICATIONS, 2017, 31 (02): : 152 - 162
  • [8] A Comparison of Two Multistage Ring Architectures for NoC Using High-Level Simulation Models
    Bourduas, S.
    Zilic, Z.
    [J]. 2008 1ST MICROSYSTEMS AND NANOELECTRONICS RESEARCH CONFERENCE, 2008, : 37 - 40
  • [9] Trellis: Portability across architectures with a high-level framework
    Szafaryn, Lukasz G.
    Gamblin, Todd
    de Supinski, Bronis R.
    Skadron, Kevin
    [J]. JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING, 2013, 73 (10) : 1400 - 1413
  • [10] HIGH-LEVEL LANGUAGE MEMORY MANAGEMENT ON PARALLEL ARCHITECTURES
    LEBRUN, P
    KREYMER, A
    [J]. COMPUTER PHYSICS COMMUNICATIONS, 1989, 57 (1-3) : 231 - 234