Implementation of an AAL for high bit rate real-time data transmission system over ATM networks using a RSE CODEC

被引:0
|
作者
Eilers, D [1 ]
Voglgsang, A [1 ]
机构
[1] Fraunhofer Inst Commun Syst, D-80686 Munich, Germany
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This work introduces an ATM Adaptation Layer (AAL) with Forward Error Correction (FEC) to serve the problems raised by high and variable bit rate real-time data transmission systems (for example studio/video applications) over ATM networks. To match the high bandwidth requirements at real-time and to minimise the implementation resources an encapsulated coding system is introduced. The coding system comprises a Reed Solomon Erasure (RSE) code, an interleaver and a CRC on cell level. The RSE is only capable of correcting cell-losses. Hence bit-errors are detected by the CRC and referenced as cell-losses. In using the RSE the benefits of ATM are exploited to improve FEC and rite overall processing time becomes significantly small against conventional solutions. The prototype is implemented in Alteras FLEX10KE series FPGAs and rite implementation details are depicted.
引用
收藏
页码:1063 / 1069
页数:7
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