Design Optimization of 3D Multi-Processor System-on-Chip with Integrated Flow Cell Arrays

被引：1

作者：

Andreev, Artem ^{[1
]}

Kaplan, Fulya ^{[2
]}

Zapater, Marina ^{[1
]}

Coskun, Ayse K. ^{[2
]}

Atienza, David ^{[1
]}

机构：

[1] Embedded Syst Lab ESL, EPFL, Lausanne, Switzerland

[2] Boston Univ, ECE Dept, Boston, MA 02215 USA

来源：

PROCEEDINGS OF THE INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN (ISLPED '18) | 2018年

基金：

欧盟地平线“2020”; 美国国家科学基金会;

关键词：

3D MPSoC design optimization; flow cell arrays; processor cooling; ENERGY; BATTERY;

D O I：

10.1145/3218603.3218606

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Integrated flow cell array (FCA) is an emerging technology, targeting the cooling and power delivery challenges of modern 2D/3D Multi-Processor Systems-on-Chip (MPSoCs). In FCA, electrolytic solutions are pumped through microchannels etched in the silicon of the chips, removing heat from the system, while, at the same time, generating power on-chip. In this work, we explore the impact of FCA system design on various 3D architectures and propose a methodology to optimize a 3D MPSoC with integrated FCA to run a given workload in the most energy-efficient way. Our results show that an optimized configuration can save up to 50% energy with respect to sub-optimal 3D MPSoC configurations.

引用

页码：237 / 242

页数：6

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