Power amplifiers in 0.13 μm CMOS for DECT:: A comparison between two different architectures

被引：3

作者：

Zimmermann, Niklas ^{[1
]}

Johansson, Ted ^{[2
]}

Heinen, Stefan ^{[1
]}

机构：

[1] Rhein Westfal TH Aachen, Chair Integrated Analog Circuits, D-52056 Aachen, Germany

[2] Infineon Technol Nord AB, SE-16481 Kista, Sweden

来源：

2007 IEEE INTERNATIONAL WORKSHOP ON RADIO-FREQUENCY INTEGRATION TECHNOLOGY, PROCEEDINGS: ENABLING TECHNOLOGIES FOR EMERGING WIRELESS SYSTEMS | 2007年

关键词：

baluns; CMOS analog integrated circuits; impedance matching; power amplifiers; transformers;

D O I：

10.1109/RFIT.2007.4443983

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Two 1.9 GHz power amplifiers (PAs) have been designed and fabricated in a 0.13 mu m standard CMOS process. They are both two-stage push-pull amplifiers with more than 27 dBm output power. The amplifier stages of both PAs have exactly the same transistor structures and sizes, but the input and interstage matching networks are realized differently. The first PA uses on-chip transformers for the coupling of the stages, the second PA LC matching networks. In this paper both topologies are compared and benefits and drawbacks of the different structures are discussed.

引用

页码：333 / +

页数：2

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