Layered T Full Adder using Quantum-dot Cellular Automata

被引:0
|
作者
Mukherjee, Chiradeep [1 ]
Sukla, Aninda Sankar [1 ]
Basu, Swarnendu Sekhar [1 ]
Khan, Angshuman [1 ]
Chakrabarty, Ratna [2 ]
De, Debashis [3 ]
机构
[1] Univ Engn & Management, Dept Elect & Commun Engn, Jaipur, Rajasthan, India
[2] Inst Engn & Management, Dept Elect & Commun Engn, Kolkata, India
[3] West Bengal Univ Technol, Comp Sci Engn Dept, Kolkata, India
关键词
Universal NAND/NOR based Logic; Potential calulation in QCA; Full adder; DESIGN;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Fast changing world has driven technology towards a milestone where emerging technology like quantum-dot cellular automata (QCA) excels in terms of ultra-high packing density and extremely low power consumption. Quantum Cellular Automata has several deduction methodologies like Majority Voter, Universal QCA logic, FNZ logic & And-Or-Invert (AOI) logic none of which explores universal NAND-NOR based design in Boolean reduction techniques. This work proposes Layered T full adder with its basic primitive which works on the basis of universal NAND and NOR logic. Layered T gate is verified taking Coulomb's law as the physics behind it. Layered T Gate is also used to implement full adder as primitive in processor based design which gives the best result in terms of cell requirement and area compared to the latest design.
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页数:6
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