A System on FPGA for Fast Handwritten Digit Recognition in Embedded Smart Cameras

This paper presents the first FPGA SoC implementation solution to the hand-written multi-digit numbers recognition problem. Our proposed solution employs a novel digit extraction method which relies on the identification of images' non-zeros columns instead of the widely used computationally-expensive segmentation method. Digit prediction is performed by a multi-layer neural network. The paper presents a design and an FPGA implementation of the proposed solution; and also discusses various optimization techniques in the neural network implementation that lead to increased performance. Our proposed solution achieves a 96.76% detection accuracy and up to 2.47x speed-up in comparison to software solutions.