A Stereo Audio Delta-Sigma DAC with 40-kHz Bandwidth and 103-dB SNR

被引:0
|
作者
Yang, Han [1 ]
Cho, Jun Soo [1 ]
Park, Yujin [1 ]
Kim, Hyunjong [1 ]
Kim, Suhwan [1 ]
机构
[1] Seoul Natl Univ, Elect Engn, Seoul, South Korea
关键词
Digital-to-analog converter; low-noise; wide-band; delta-sigma modulator; switched-capacitor circuits;
D O I
10.5573/JSTS.2018.18.6.685
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A wide-band and low-noise stereo delta-sigma (Delta Sigma) digital-to-analog converter (DAC) for audio applications is proposed. A multi-bit quantizer with data-weighted averaging is used to reduce quantization noise and a half-band finite impulse response filter is designed to increase the speed of the Delta Sigma modulator. A direct-charge-transfer switched-capacitor DAC and a track-and-hold circuit with a deglitch timing are used to improve the operating speed and the linearity of the audio DAC. The chip is fabricated with a 0.13-mu m CMOS process, which uses the supply voltages of 1.2 V for the digital domain and 3.3 V for the analog domain. The experimental results show that our audio DAC achieves 40-kHz bandwidth, 103-dB A-weighted signal-to-noise ratio, and -85-dB total harmonic distortion and noise.
引用
收藏
页码:685 / 693
页数:9
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