Analysis and Implementation of Closed-Loop Control of Electrolytic Capacitor-Less Six-Pulse DC-Link Bidirectional Three-Phase Grid-Tied Inverter

被引:16
|
作者
Kanakesh, V. K. [1 ]
Yelaverthi, Dorai Babu [2 ]
Ghoshal, Anirban [3 ]
Rathore, Akshay Kumar [4 ]
Mahanty, Ranjit [5 ]
机构
[1] Univ Calif Berkeley, Berkeley Educ Alliance Res Singapore, Berkeley, CA 94720 USA
[2] Utah State Univ, Logan, UT 84322 USA
[3] Indian Sch Mines, Indian Inst Technol, Dhanbad 826004, Bihar, India
[4] Concordia Univ, Elect & Comp Engn Dept, Montreal, PQ H3G 1M8, Canada
[5] BHU, Indian Inst Technol, Dept Elect Engn, Varanasi 221005, Uttar Pradesh, India
关键词
Cascaded dual active bridge (DAB); dead time effect; decoupling capacitor; six-pulse modulation (SPM); voltage-source converter (VSC); CONVERTER SYSTEMS; CELL VEHICLES; MODULATION;
D O I
10.1109/TIA.2017.2757438
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Cascaded bidirectional dc-ac converters are commonly used in uninterruptible power supply applications and battery chargers for electric vehicles. Power conversion units for such applications employ a large electrolytic capacitor at high-voltage dc bus, which not only reduces the lifetime but also adds to the weight of the converter. In this paper, a novel bidirectional dual active bridge cascaded three-phase converter (DABCC) with six-pulse dc link is proposed. Also, a new closed-loop control scheme to implement the six-pulse modulation (SPM) technique in DABCC is proposed. The advantages of the proposed control scheme in DABCC are that the electrolytic capacitor is eliminated and is replaced with a low-value film capacitor resulting in increased reliability, compactness, and reduced cost. SPM technique also increases the dc bus utilization and decreases the inverter average switching frequency to 33% when compared with the conventional sine pulse-width modulation (SPWM). Harmonic components introduced in the pole voltages of the SPM-modulated DABCC due to inverter dead time are analyzed, and a resonant controller is designed to mitigate them. Also, root mean square current stress for high-voltage dc-link capacitor is studied, and it is shown that the capacitor requirement for SPM modulation is lower than the conventional SPWM. To validate the proposed control scheme, an 800-W proof-of-concept laboratory hardware prototype is fabricated and experimental results are demonstrated.
引用
收藏
页码:539 / 550
页数:12
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