Research on computing IP core for the digital signature algorithm

被引：0
|
作者：
Chu, JP [1 ]
Xu, YS [1 ]
Li, XJ [1 ]
Lai, ZS [1 ]
机构：
[1] E China Normal Univ, Inst Microelect Circuits & Syst, Shanghai 200062, Peoples R China
来源：
2003 5TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS | 2003年
关键词：
D O I：
10.1109/ICASIC.2003.1277462
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Polynomial multiplication with big integer coefficients over finite field is frequently used in some digital signature algorithms, in which this kind of calculation is the most time consuming part realized by software. This paper presents a new method (FFT/IFFT) and try to solve it using FPGA. With the reduced calculation amount compared with normal algorithm and realized in hardware, it will greatly raise not only the performance of this calculation procedure but also the level of security. At the end of this paper, some intermediate results are given.
引用
收藏
页码：1329 / 1331
页数：3
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