Innovative hybrid optical/digital ultra-fast packet-switched processor for meshed satellite networks

This paper describes the architectural study of an innovative ultra-fast packet-switched transparent processor dealing efficiently with unicast and multicast applications. The proposed architecture aims at outperforming current packet processor architectures in terms of total throughput and efficiency. In order to cope with the limitations of today's on board processors, three new concepts are introduced: transparent burst switching, channel multiplexing, and bandwidth asymmetry. Some of these concepts are already well known in the field of optical terrestrial networks but need further improvements and adaptations to cope with the requirements of satellite processors and systems. Transparent burst switching is used to enhance the transparency of the processor: the packet payload is processed transparently and only the header is demodulated onboard. The channel multiplexing and bandwidth asymmetry techniques are used to consolidate bufferless switch architectures, which appear to be very attractive for increasing the overall throughput of switches. Finally, the paper introduces an innovative efficient and scalable hybrid optical/digital implementation of this processor. The focus here is on a satellite-switched code/time-division multiple-access type of system but the results and concepts provided in this paper can apply to other satellite-switched systems.