Optimization of Digital Predistortion with Memory

In this paper identification of the digital predistortion (DPD) operator for power amplifier (PA) linearization is considered. Improving the identification performance generally amounts to finding the appropriate reduced-complexity parametrized model of memory nonlinearity and to avoid ill-conditionality of the corresponding LS problem. The common approaches to truncation of the discrete-time Volterra operator kernels are first discussed. Then further reduction of model dimensions and improvement of the LS problem conditionality by means of undersampling technique and using higher bandwidth training signal is justified. The discussed approaches to model optimization are tested in a computer simulation test-bed of a memory PA identification / linearization routine.