A Fully-Integrated Cartesian Feedback Loop Transmitter in 65nm CMOS

被引:0
|
作者
Li, Jinbo [1 ]
Shu, Ran [1 ]
Gu, Qun Jane [1 ]
机构
[1] Univ Calif Davis, Davis, CA 95616 USA
关键词
PA linearization; Cartesian feedback; transmitter; fully-integrated; on-chip PA;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper demonstrates a fully-integrated Cartesian feedback loop transmitter (TX) in CMOS 65nm. LO path phase shifters, aiming at compensating the phase misalignments between up- and down-conversion mixers or RF path phase delays, are improved by an interpolation scheme to ensure consecutive 360 degrees tuning range. Power supplies of different circuit blocks are separated to cut off the nested feedback loops formed between the power buses and the circuit blocks for the stability consideration. The transmitter delivers 18.5dBm output P1dB at 9GHz. Over 10dB suppression ratio of intermodulation products in the two-tone test is achieved, and ACPR is improved by 9dB using a 2Mbps 16QAM testing signal. The maximum IM3 suppression is over 15 dB at medium output power levels.
引用
收藏
页码:103 / 106
页数:4
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