Low-Power High-Efficiency Video Decoding using General-Purpose Processors

被引:11
|
作者
Chi, Chi Ching [1 ]
Alvarez-Mesa, Mauricio [1 ]
Juurlink, Ben [1 ]
机构
[1] Tech Univ Berlin, Inst Tech Informat & Mikroelekt TIME, D-10587 Berlin, Germany
关键词
HEVC; H.265; Parallel; Multicore; SIMD; DVFS; Low Power; UHD; Video decoding; parallel processing; low-power computing; LEAKAGE;
D O I
10.1145/2685551
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this article, we investigate how code optimization techniques and low-power states of general-purpose processors improve the power efficiency of HEVC decoding. The power and performance efficiency of the use of SIMD instructions, multicore architectures, and low-power active and idle states are analyzed in detail for offline video decoding. In addition, the power efficiency of techniques such as "race to idle" and "exploiting slack" with DVFS are evaluated for real-time video decoding. Results show that "exploiting slack" is more power efficient than "race to idle" for all evaluated platforms representing smartphone, tablet, laptop, and desktop computing systems.
引用
收藏
页数:25
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