Mobility evaluation in transistors with charge-trapping gate dielectrics

被引：31

作者：

Bersuker, G ^{[1
]}

Zeitzoff, P ^{[1
]}

Sim, JH ^{[1
]}

Lee, BH ^{[1
]}

Choi, R ^{[1
]}

Brown, G ^{[1
]}

Young, CD ^{[1
]}

机构：

[1] SEMATECH, Austin, TX 78741 USA

来源：

APPLIED PHYSICS LETTERS | 2005年 / 87卷 / 04期

关键词：

D O I：

10.1063/1.1995956

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

Fast electron trapping in high-k gate dielectrics is shown to effectively increase the magnitude of the threshold voltage during the dc measurements of the drain current, which leads to underestimation of the intrinsic channel carrier mobility. An approach based on the pulse I-d-V-g technique is proposed to estimate a correction factor to the dc mobility. (c) 2005 American Institute of Physics.

引用

页数：3

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